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71M6545/71M6545H Data Sheet
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The interrupt request register, IRCON (see Table 29 ).
The interrupt priority registers: IP0 and IP1 (see Table 34 ).
Table 24: The IEN0 Bit Functions (SFR 0xA8)
Bit
IEN0[7]
IEN0[6]
IEN0[5]
IEN0[4]
IEN0[3]
IEN0[2]
IEN0[1]
IEN0[0]
Bit
IEN1[7]
IEN1[6]
IEN1[5]
IEN1[4]
IEN1[3]
IEN1[2]
IEN1[1]
IEN1[0]
Bit
IEN2[0]
Bit
TCON[7]
TCON[6]
TCON[5]
TCON[4]
TCON[3]
TCON[2]
TCON[1]
TCON[0]
v2
Symbol
EAL
–
–
ES0
ET1
EX1
ET0
EX0
Symbol
–
–
EX6
EX5
EX4
EX3
EX2
–
Symbol
ES1
Symbol
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Function
EAL = 0 disables all interrupts.
Not used.
Not Used.
ES0 = 0 disables serial channel 0 interrupt.
ET1 = 0 disables timer 1 overflow interrupt.
EX1 = 0 disables external interrupt 1.
ET0 = 0 disables timer 0 overflow interrupt.
EX0 = 0 disables external interrupt 0.
Table 25: The IEN1 Bit Functions (SFR 0xB8)
Function
Not used.
Not used.
EX6 = 0 disables external interrupt 6.
EX5 = 0 disables external interrupt 5.
EX4 = 0 disables external interrupt 4.
EX3 = 0 disables external interrupt 3.
EX2 = 0 disables external interrupt 2.
Not Used.
Table 26: The IEN2 Bit Functions (SFR 0x9A)
Function
ES1 = 0 disables the serial channel 1 interrupt.
Table 27: TCON Bit Functions (SFR 0x88)
Function
Timer 1 overflow flag.
Not used for interrupt control.
Timer 0 overflow flag.
Not used for interrupt control.
External interrupt 1 flag.
External interrupt 1 type control bit:
0 = interrupt on low level.
1 = interrupt on falling edge.
External interrupt 0 flag
External interrupt 0 type control bit:
0 = interrupt on low level.
1 = interrupt on falling edge.
41
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